PM7347 Manuals


PM7347
PMC-Sierra,Inc.
S/UNI-JET
SATURN User Network Interface for J2/E3/T3
FEATURES
• Implements the Physical Layer 
• Provides performance monitoring 
Convergence Protocol (PLCP) for T1 
counters suitable for accumulation 
• Single-chip ATM User Network 
and DS3 transmission systems 
periods up to one second.
Interface (UNI) operating at 44.736 
according to the ATM Forum UNI 
• Provides an 8-bit microprocessor 
Mbit/s, 34.368 Mbit/s, and 6.312 Mbit/s 
Specification and ANSI 
interface for configuration, control, and 
conforming to ATMF-95-1207R1, 
TA-TSY-000773, TA-TSY-000772, and 
status monitoring.
ATMF-94-0406R5, and 
for E1 and E3 transmission systems 
AF-PHY-0029.000.
• Provides a standard 5-signal P1149.1 
according to ETSI 300-269 and ETSI 
JTAG test port for boundary scan 
• Provides on-chip DS3, E3 (G.751 and 
300-270.
board-test purposes.
G.832), and J2 framers. Can be 
• Implements the ATM physical layer for 
• Low power 3.3 V CMOS technology 
configured for use solely as a framer. 
broadband ISDN according to ITU-T 
When configured in framer mode, 
with 5 V-tolerant inputs.
Recommendation I.432.
gapped transmit and receive clocks 
• Available in a high density 256-pin 
• Uses the PM4341 T1XC, PM6341 
can be generated for interfaces that 
SBGA package (27 mm by 27 mm).
E1XC, PM4351 COMET, and framer/
need access only to payload data bits.
• Rated for industrial temperature 
line interface chips for T1 and E1 
• Supports bypass of the internal 
operation.
applications.
framers and supports connections to 
• Provides seamless interface to the 
an arbitrary-rate external transmission 
APPLICATIONS
VORTEX DSLAM chipset, 
system interface up to a rate of 52 
S/UNI®-ATLAS, and 
• DSLAM Uplinks
Mbit/s. This lets the S/UNI-JET be 
S/UNI-RCMP-200.
• Enterprise ATM/PPP Uplinks
used as an ATM cell delineator.
• Provides programmable 
• ATM or Frame Relay Switches, 
• Implements ATM direct-cell mapping 
pseudo-random test pattern 
Multiplexers, and Routers
into T1, DS3, E1, E3, and J2 
generation, detection, and analysis 
• DS3/E3/J2 PPP Internet Access 
transmission systems according to 
features.
Interfaces
ITU-T Recommendation G.804.
• Provides integral transmit and receive 
• DS3/E3/J2 Frame Relay Interfaces
• Provides a SCI-PHY and 50 MHz 
HDLC control ers with 128-byte FIFO 
UTOPIA Level 2 compatible 8- or 
depths.
16-bit ATM-PHY Interface.
BLOCK DIAGRAM
SIG T1: TPOHINS
SIG T2: TPOH/TDAT
SIG T3: TIOHM/TFP/TMFP
SIG T4: TICLK
SIG T5: TPOHCLK
SIG T6: TPOHFP/TFPO/TMFPO/TGAPCLK/TCELL
SIG T7: REF8KI
TO
TO
TO
HI
TO
HC
NS
H
H
L
K
F
P
SI
TRS
S
SI
SI
I
SI
S
S
G
G T
G
G
G T
I
I
G
G
TDO
TC
TDI
TMS
 
 T
 T
 
 
T
1/2 TTB
T
2
3
T
T
K
B
XBOC
TDFR
Transmit
1
4
5
6
7
Transmit
Receive
Receive
IEEE
P1149.1
DTCA
TDAT [15:0]
SPLT
TRAN
TPRTY
TNEG/TOHM
Line
Transmit
J2, E3 OR DS3
TXCP_50
TXFF
TSOC
TPOS/TDATO
ATM and
Transmit
Transmit
PLCP
TCA
TCLK
Framer
TADR [2:0]
TENB
 BER
TFCLK
GD
PHY_ADR[2:0]
PR
System
ATM8
ATMF/SPLR
RFCLK
RCLK
FRMR
Line
Receive
RXFF
RXCP_50
RENB
RPOS/RDAT
J2, E3 or DS3
ATM and
Receive
Receive
PLCP
4-Cell
RADR [2:0]
RNEG/RLCV/ROHM
Framer
RCA
RSOC
RPRTY
RDAT [15:0]
DRCA
MPIF
RBOC
RFDL
PMON
Receive
1/2 TTB
CCPM
Microprocessor
Receive
Receive
Perfor-
O/H
Receive
PLCP/cell
mance
RO
RO
RO
R
D
A[
ALE
CS
WRB
RD
RS
IN
C
[
7:
10:
TB
SIG R1: FRMSTAT
H
H
ELL
B
B
T
C
H
0]
0
B
L
F
SI
]
K
P
SI
SI
SI
SI
SIG R2: RPOCHCLK/
G
G R
G R
G R
G R
 R
5
4
3
2
1
RSCLK/RGAPCLK
SIG R3: REF8KO/
RPOHFP/RFPO/RMFPO
SIG R4: RPOH/ROVRHD
SIG R5: LCD/RDATO
PMC-990996 (R2) 
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
ã 1999 PMC-Sierra, Inc.

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