PM5355 Manuals
PM5355
PMC-Sierra,Inc.
S/UNI-622
622 Mbit/s SATURN User Network Interface
FEATURES
• Compatible with ATM Forum UTOPIA
• Packaged in a 208-pin, 28 mm by
interface format, with support for multi-
28 mm slugged Plastic Quad Flat Pack
• Monolithic SATURN®-compatible
PHY applications.
(PQFP) with 0.5 mm pin pitch.
SONET/SDH ATM User Network
• Provides access to section and line
Interface (UNI) for LAN, Public UNI, and
datalinks and all additional overhead to
Public NNI connections.
allow external processing for full
APPLICATIONS
• Implements the ATM Transmission
SONET/SDH Network-Node Interface
• Workstations and Personal Computer
Convergence (TC) sublayer according to
(NNI) compliance.
• LAN Switches and Hubs
ATM Forum specifications using the
• Provides a generic 8-bit
• Routers
SONET/SDH 622.08 Mbit/s and
microprocessor bus interface for
155.52 Mbit/s formats.
• Video Servers
configuration, control, and status
• Also supports the SONET 51.84 Mbit/s
• Backbones
monitoring.
format.
• Broadband Switching Systems
• Provides a standard 5-signal P1149.1
• Processes all SONET/SDH UNI
• Test Equipment
JTAG test port for boundary scan
overhead.
board test purposes.
• Inserts and extracts ATM payloads using
• Provides TTL-compatible inputs and
ATM cell delineation.
outputs.
• Provides a SCI-PHY™-compliant 50 MHz
• Low power, +5 V CMOS technology.
synchronous 16-bit (4-cell deep) FIFO
buffers in both transmit and receive paths.
BLOCK DIAGRAM
C
LK
C
W
,
TSU
TO
W
W
]
O
K
K
O
]
K,
K
P
K
]
L
L
[4:1
F
EN
FP
EN
:
0
B
S
C
,
TS
,
T
H
H
HCL
H
K
H
H
5
:
0
H
I
S
AI
RDI
DCL
D
O
O
O
O
L
P
OCL
OHCL
RDI
P[
3
P
FC
FF
S
P[
O
I
K
ST
L
L
T
T
P
P
TL
TSD
TSD
T
T
TL
T
TT
T
TT
TC
TF
GT
TPO
TPO
T
TPO
TPA
T
PO
PI
TC
TG
XO
TD
TD
TC
TM
TR
Transport
Path
Parallel
O/H
JTAG Test
O/H
Input/Output
Insert
Access Port
Insert
Port
TSICLK
TSOC
TSOUT
TDAT[15:0]
Transmit
TXPRTY[1:0]
FPOUT
Section
Transmit Path
O/H
Transmit
Byte-
TCA
POUT[7:0]
Transmit
Transmit
O/H Processor
Processor
Line O/H
Interleaved
ATM Cell
ATM 4-Cell
TWRENB
OOF
Processor
Mux
Transmit ConCat
Processor
Processor
Section
Path
FIFO
TFCLK
Line Side
Drop
PICLK
Trace
Trace
Interface
Side
RSOC
FPIN
Buffer
Receive ConCat
Buffer
Receive
Receive
Interface
Receive
Byte-
Processor
ATM Cell
ATM 4-Cell
RDAT[15:0]
FPOS
Receive
Line O/H
Interleaved
Processor
FIFO
Section
Receive Path
RXPRTY[1:0]
PIN[7:0]
Processor
Demux
O/H
O/H Processor
RCA
RSICLK
Processor
RRDENB
RSIN
RFCLK
Transport
Path O/H
Microprocessor
O/H
Extract
Interface
Extract
]
]
]
S
K
K
P
K
P
H
P
K
P
S
D
IS
LK
:
0
:
0
E
B
B
C
RDI
OW
O
7
7
T
LO
LOF
LA
[4:1
C
LO
LC
AL
CSB
L
PAI
RCP
SEN
DCL
OHF
HCL
OHF
HCL
PRDI
D[
A[
WRB
RDB
INT
RS
RP
RGF
T
WCL
,
RSUC
OH
O
W
RL
D, RL
RT
GRO
RPOHF
RT
RT
RPO
K, RO
RL
RSDCL
RSD, RSO
PMC-940402 (R5)
©1998 PMC-Sierra, Inc. October, 1998
Big size of image:
Please install Flash player from http://get.adobe.com/flashplayer/!
PMC-Sierra,Inc.
S/UNI-622
622 Mbit/s SATURN User Network Interface
FEATURES
• Compatible with ATM Forum UTOPIA
• Packaged in a 208-pin, 28 mm by
interface format, with support for multi-
28 mm slugged Plastic Quad Flat Pack
• Monolithic SATURN®-compatible
PHY applications.
(PQFP) with 0.5 mm pin pitch.
SONET/SDH ATM User Network
• Provides access to section and line
Interface (UNI) for LAN, Public UNI, and
datalinks and all additional overhead to
Public NNI connections.
allow external processing for full
APPLICATIONS
• Implements the ATM Transmission
SONET/SDH Network-Node Interface
• Workstations and Personal Computer
Convergence (TC) sublayer according to
(NNI) compliance.
• LAN Switches and Hubs
ATM Forum specifications using the
• Provides a generic 8-bit
• Routers
SONET/SDH 622.08 Mbit/s and
microprocessor bus interface for
155.52 Mbit/s formats.
• Video Servers
configuration, control, and status
• Also supports the SONET 51.84 Mbit/s
• Backbones
monitoring.
format.
• Broadband Switching Systems
• Provides a standard 5-signal P1149.1
• Processes all SONET/SDH UNI
• Test Equipment
JTAG test port for boundary scan
overhead.
board test purposes.
• Inserts and extracts ATM payloads using
• Provides TTL-compatible inputs and
ATM cell delineation.
outputs.
• Provides a SCI-PHY™-compliant 50 MHz
• Low power, +5 V CMOS technology.
synchronous 16-bit (4-cell deep) FIFO
buffers in both transmit and receive paths.
BLOCK DIAGRAM
C
LK
C
W
,
TSU
TO
W
W
]
O
K
K
O
]
K,
K
P
K
]
L
L
[4:1
F
EN
FP
EN
:
0
B
S
C
,
TS
,
T
H
H
HCL
H
K
H
H
5
:
0
H
I
S
AI
RDI
DCL
D
O
O
O
O
L
P
OCL
OHCL
RDI
P[
3
P
FC
FF
S
P[
O
I
K
ST
L
L
T
T
P
P
TL
TSD
TSD
T
T
TL
T
TT
T
TT
TC
TF
GT
TPO
TPO
T
TPO
TPA
T
PO
PI
TC
TG
XO
TD
TD
TC
TM
TR
Transport
Path
Parallel
O/H
JTAG Test
O/H
Input/Output
Insert
Access Port
Insert
Port
TSICLK
TSOC
TSOUT
TDAT[15:0]
Transmit
TXPRTY[1:0]
FPOUT
Section
Transmit Path
O/H
Transmit
Byte-
TCA
POUT[7:0]
Transmit
Transmit
O/H Processor
Processor
Line O/H
Interleaved
ATM Cell
ATM 4-Cell
TWRENB
OOF
Processor
Mux
Transmit ConCat
Processor
Processor
Section
Path
FIFO
TFCLK
Line Side
Drop
PICLK
Trace
Trace
Interface
Side
RSOC
FPIN
Buffer
Receive ConCat
Buffer
Receive
Receive
Interface
Receive
Byte-
Processor
ATM Cell
ATM 4-Cell
RDAT[15:0]
FPOS
Receive
Line O/H
Interleaved
Processor
FIFO
Section
Receive Path
RXPRTY[1:0]
PIN[7:0]
Processor
Demux
O/H
O/H Processor
RCA
RSICLK
Processor
RRDENB
RSIN
RFCLK
Transport
Path O/H
Microprocessor
O/H
Extract
Interface
Extract
]
]
]
S
K
K
P
K
P
H
P
K
P
S
D
IS
LK
:
0
:
0
E
B
B
C
RDI
OW
O
7
7
T
LO
LOF
LA
[4:1
C
LO
LC
AL
CSB
L
PAI
RCP
SEN
DCL
OHF
HCL
OHF
HCL
PRDI
D[
A[
WRB
RDB
INT
RS
RP
RGF
T
WCL
,
RSUC
OH
O
W
RL
D, RL
RT
GRO
RPOHF
RT
RT
RPO
K, RO
RL
RSDCL
RSD, RSO
PMC-940402 (R5)
©1998 PMC-Sierra, Inc. October, 1998
Document Outline
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